In a magnetic tape storage data channel it is desirable to recover regular clock timing information so that each bit can be detected and decoded properly.
One prior art approach for achieving this is to use a “common clock” which operates by generating a single clock which is distributed to all data channels. Each data channel then aligns the phase of the clock with the particular data stream that it is receiving. Typically, the clock needs to be running at a high multiple of the data rate so that an appropriate phase can be chosen by each data channel. However, since there are only certain phases available, some degree of fixed phase error will result.
Another prior art approach, used in analog clock recovery systems, utilizes a single, common capacitor which is AC coupled to each data channel's phase locked loop (“PLL”) circuit. This capacitor receives the combined outputs of all PLL charge pumps so as to maintain a level reflective of an overall data frequency for all of the data channels. Short term data rates at individual data channels may occur, however, due to changes in an orientation of a moving tape relative to a read/write head, commonly referred to as “azimuth.” Short term data rate variation at individual data channels is not addressed by the common capacitor approach.